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Oak Technology, Inc was founded in 1987. During the late 1980s through the early 1990s, Oak was a supplier of PC graphics (SVGA) chipsets and PCBs. Oak Technology also supplied mother board chipsets - a PS2 compatible chipset and the Oaknote chipset for notebooks. Oak enjoyed modest success in the value segment (low-end) of the market, but without an effective Windows accelerator, ultimately failed to remain competitive.
OTI037C 8-bit VGA chipset, with up to 256KB of DRAM. Provided support for VGA, EGA & CGA display modes. Most are only able to do standard VGA modes. (i.e. up to 320x200x256 and up to 640x480x16).
OTI057/067 ISA SVGA chipsets. Supports up to 512KB of DRAM (usually 70/80 ns).
OTI077 Enhanced version of the OTI067. Includes support for 1MB and up to 65Mhz dot-clock. Capable of resolutions up to 1024x768x256 colors in Non-Interlaced mode, and up to 1280x1024x16 colors Interlaced.
OTI087 One of the first VLB chipsets available. Has a 16-bit external data path, and a 32-bit internal memory-controller data path. It features some acceleration hardware: register-based color expansion, hardware cursor, primitive BitBLT engine, 4-bit graphic latch and some other new (for its time) features. Maximum BIOS resolutions are 1024x768x256 Non-Interlaced and 1280x1024x256 interlaced. Maximum Dot-Clock is 80Mhz, but is usually coupled with the OTI068 clock generator capable of frequencies up to 78Mhz. This chipset supports up to 2MB of 70/70R ns DRAM.
Spitfire - OTI 64105/64107 64-bit DRAM chipset. Very rare.
Spitfire - OTI 64111 64-bit PCI/ISA 2D chipset. DRAM and EDO supported. Very Rare.
Warp 5 - OTI 64317
During the late 1990s, Oak was developing their first and only 2D/3D graphics accelerator chip. Warp 5 was to be a tile-based deferred renderer (TBDR), similar to PowerVR's chipsets. In the same vein as the S3 ViRGE chip, the Warp 5 was pin-compatible with a 2D-only predecessor. The chip was never released because ATI acquired the technology. It was Oak's final mainstream graphics chip development effort.
This graphics processor was based on a region concept and had many similarities to Microsoft's Talisman architecture. The chip processed each region at a time and did on chip z-sorting and anti-aliasing. As a result, the chip did 24-bit floating point Z, sub-pixel anti-aliasing, order independent translucency, non-linear fogging and atmospheric effects and MIP-Mapping. Typically, such region based architectures are gated by the number of polygons that can be processed per region, but Oak claimed that there were no such limitations in the WARP 5.
- The specifications included:
- 50m pixels/sec (all features turned on)
- EDO and SGRAM Memory Supported - 8MB
- On-chip Texture Cache
- 2D GUI acceleration
- Video Scaling in Y
- VBI support Including Intercast
- 220MHz RAMDAC
- Resolutions to 1600 X 1200
- Direct3D and BRender APIs supported
- OS support Windows 95 and Windows NT
- Packaging - 256 pin BGA
- Pin Compatibility with OAK OTI-74217 EON 2D GUI accelerator
- Kieron Murphy (1996-04-10). "So why did they decide to call it Java?". javaworld.com. Retrieved 2009-08-03.
- "Inside Look @ Metabyte" by Amer "Mossad" Ajami, October 13, 1998, retrieved December 26, 2005
- "Oak Warp 5 Review" by Rage's Hardware, Date Unknown, retrieved December 26, 2005
- "Video Card Benchmark Page" by Rage's Hardware, Date Unknown, retrieved December 26, 2005
- http://list.driverguide.com/list/company745/ - some drivers for Oak graphics cards